Record number :
95931
Title of article :
A general design methodology for the optimal multiple-field-limiting-ring structure using device simulator
Author/Authors :
Cheng، Xu نويسنده , , J.K.O.، Sin, نويسنده , , Kang، Baowei نويسنده , , Wu، Yu نويسنده , , J.، Shen, نويسنده , , Huai، Yong-jin نويسنده , , Li، Rui-zhen نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Pages :
-2272
From page :
2273
To page :
0
Abstract :
A design methodology for the optimal multiple-field-limiting-ring (FLR) termination structure is proposed. In the methodology, a simple modeling structure is developed to find the so-called BV-spacing curve, from which the optimal structure can be obtained directly without trial and error. The results given by the methodology is in excellent agreement with the experimental results. The applicability of the methodology is also investigated in a wide scope, which shows that the methodology has a very good performance in the medium-voltage-range FLR termination design.
Keywords :
device scaling , channel hot electron (CHE) , Flash electrically erasable programmable read-only memories (EEPROMs) , hot carriers , Monte Carlo simulation , programming efficiency , channel initiated secondary electron (CHISEL)
Journal title :
IEEE TRANSACTIONS ON ELECTRON DEVICES
Journal title :
IEEE TRANSACTIONS ON ELECTRON DEVICES
Serial Year :
2003
Link To Document :
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