Record number :
95643
Title of article :
Failure analysis of 6T SRAM on low-voltage and high-frequency operation
Author/Authors :
Y.، Mitsui, نويسنده , , Y.، Yoshida, نويسنده , , S.، Ikeda, نويسنده , , K.، Ishibashi, نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Pages :
-126
From page :
127
To page :
0
Abstract :
Careful analysis of SRAM bit failure at high-frequency operation has been described. Using the nanoprober technique, MOS characteristics of failure bit in actual memory cells had been measured directly. It was confirmed that the drain current of a PMOS was about one order in magnitude smaller and the threshold voltage was about 1 V higher than that for normal bits. A newly developed, unique selective etching technique using hydrazine mixture showed these degradations were caused by local gate depletion, and TEM observation showed the PMOS gate poly-Si of the failure bit had a huge grain. Minimizing grain size of the gate poly-Si is found to be quite effective for improving drain current degradation and suppressing this failure mode.
Keywords :
Navier-Stokes , Krylov , Newton , Non-linear , Multigrid
Journal title :
IEEE TRANSACTIONS ON ELECTRON DEVICES
Serial Year :
2003
Link To Document :
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