Record number :
100092
Title of article :
Low error fixed-width CSD multiplier with efficient sign extension
Author/Authors :
K.K.، Parhi, نويسنده , , Kim، Sang-Min نويسنده , , Chung، Jin-Gyun نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Pages :
-983
From page :
984
To page :
0
Abstract :
This paper presents an error compensation method for fixed-width canonic signed digit (CSD) multipliers that receive a Wbit input and produce a W-bit product. To efficiently compensate for the quantization error, the truncated bits are divided into two groups (major group and minor group) depending upon their effects on the quantization error. The desired error compensation bias is first expressed in terms of the truncated bits in the major group. Then the effects of the other truncated bits in the minor group are taken care of by a probabilistic estimation. Also, an efficient sign extension reduction method applied to the fixed-width CSD multipliers is proposed. By simulations, it is shown that 25% reduction in the truncation error and 13% hardware complexity can be achieved by the proposed error compensation and sign extension reduction methods, respectively.
Keywords :
Abdominal obesity , Food patterns , Prospective study , waist circumference
Journal title :
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II:ANALOG AND DIGITAL SIGNAL PROCESSING
Journal title :
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II:ANALOG AND DIGITAL SIGNAL PROCESSING
Serial Year :
2003
Link To Document :
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