Record number :
100043
Title of article :
Background calibration techniques for multistage pipelined ADCs with digital redundancy
Author/Authors :
Moon، Un-Ku نويسنده , , Li، Jipeng نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Pages :
-530
From page :
531
To page :
0
Abstract :
The proposed digital background calibration scheme, applicable to multistage (pipelined or algorithmic/cyclic) analog-to-digital converters (ADCs), corrects the linearity errors resulting from capacitor mismatches and finite opamp gain. A high-accuracy calibration is achieved by recalculating the digital output based on each stageʹs equivalent radix. The equivalent radices are extracted in the background by using a digital correlation method. The proposed calibration technique takes advantage of the digital redundancy architecture inherent to most pipelined ADCs. In the proposed method, the SNR is not degraded from the pseudorandom noise sequence injected into the system. A two-channel ADC architecture with negligible overhead is also proposed to significantly improve the efficiency of the digital correlation. Simulation results confirm that 16-bit linearity can be achieved after calibration for an ADC with (sigma)=0.1% capacitor mismatches and 60 dB opamp gain.
Keywords :
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Journal title :
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II:ANALOG AND DIGITAL SIGNAL PROCESSING
Journal title :
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II:ANALOG AND DIGITAL SIGNAL PROCESSING
Serial Year :
2003
Link To Document :
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